From ceea575e920808aa57ed7f926c32402c22cd7715 Mon Sep 17 00:00:00 2001 From: yangxiaojuan Date: Tue, 17 Oct 2023 16:47:54 +0800 Subject: [PATCH] Add loongarch64 support --- ...-meson-add-loongarch64-build-support.patch | 47 +++++++++++++ ...ry-disable-coroutines-on-loongarch64.patch | 52 +++++++++++++++ ...-LLVMBuildFPToUI-when-the-float-is-n.patch | 29 ++++++++ ...-optlevel-for-debug-purpose-on-loong.patch | 66 +++++++++++++++++++ mesa.spec | 9 ++- 5 files changed, 202 insertions(+), 1 deletion(-) create mode 100644 0001-meson-add-loongarch64-build-support.patch create mode 100644 0002-gallivm-temporary-disable-coroutines-on-loongarch64.patch create mode 100644 0003-gallivm-arit-use-LLVMBuildFPToUI-when-the-float-is-n.patch create mode 100644 0004-gallivm-add-more-optlevel-for-debug-purpose-on-loong.patch diff --git a/0001-meson-add-loongarch64-build-support.patch b/0001-meson-add-loongarch64-build-support.patch new file mode 100644 index 0000000..da70e51 --- /dev/null +++ b/0001-meson-add-loongarch64-build-support.patch @@ -0,0 +1,47 @@ +From 4ab7e88994234c14972cde4731e73e5c3bef9502 Mon Sep 17 00:00:00 2001 +From: suijingfeng +Date: Sun, 11 Jul 2021 04:23:59 +0800 +Subject: [PATCH 1/4] meson: add loongarch64 build support + +Signed-off-by: suijingfeng +--- + meson.build | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/meson.build b/meson.build +index bd54e78..3242bb7 100644 +--- a/meson.build ++++ b/meson.build +@@ -176,6 +176,8 @@ if dri_drivers.contains('auto') + dri_drivers = [] + elif ['mips', 'mips64', 'riscv32', 'riscv64'].contains(host_machine.cpu_family()) + dri_drivers = ['r100', 'r200', 'nouveau'] ++ elif ['loongarch64'].contains(host_machine.cpu_family()) ++ dri_drivers = [] + else + error('Unknown architecture @0@. Please pass -Ddri-drivers to set driver options. Patches gladly accepted to fix this.'.format( + host_machine.cpu_family())) +@@ -215,6 +217,11 @@ if gallium_drivers.contains('auto') + gallium_drivers = [ + 'r300', 'r600', 'radeonsi', 'nouveau', 'virgl', 'swrast' + ] ++ elif ['loongarch64'].contains(host_machine.cpu_family()) ++ gallium_drivers = [ ++ 'r300', 'r600', 'radeonsi', 'nouveau', 'etnaviv', 'kmsro', 'swrast', ++ 'virgl' ++ ] + else + error('Unknown architecture @0@. Please pass -Dgallium-drivers to set driver options. Patches gladly accepted to fix this.'.format( + host_machine.cpu_family())) +@@ -268,6 +275,8 @@ if _vulkan_drivers.contains('auto') + _vulkan_drivers = ['swrast'] + elif ['mips', 'mips64', 'riscv32', 'riscv64'].contains(host_machine.cpu_family()) + _vulkan_drivers = ['amd', 'swrast'] ++ elif ['loongarch64'].contains(host_machine.cpu_family()) ++ _vulkan_drivers = ['amd', 'swrast'] + else + error('Unknown architecture @0@. Please pass -Dvulkan-drivers to set driver options. Patches gladly accepted to fix this.'.format( + host_machine.cpu_family())) +-- +2.20.1 + diff --git a/0002-gallivm-temporary-disable-coroutines-on-loongarch64.patch b/0002-gallivm-temporary-disable-coroutines-on-loongarch64.patch new file mode 100644 index 0000000..a0d15ed --- /dev/null +++ b/0002-gallivm-temporary-disable-coroutines-on-loongarch64.patch @@ -0,0 +1,52 @@ +From 4605ef15620cb3fea64fc3f1af74722f06937e06 Mon Sep 17 00:00:00 2001 +From: suijingfeng +Date: Sun, 11 Jul 2021 06:12:17 +0800 +Subject: [PATCH 2/4] gallivm: temporary disable coroutines on loongarch64 + +Signed-off-by: suijingfeng +--- + src/gallium/auxiliary/gallivm/lp_bld.h | 4 ++++ + src/gallium/auxiliary/gallivm/lp_bld_init.c | 4 ++-- + 2 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/src/gallium/auxiliary/gallivm/lp_bld.h b/src/gallium/auxiliary/gallivm/lp_bld.h +index 9144428..4fdc075 100644 +--- a/src/gallium/auxiliary/gallivm/lp_bld.h ++++ b/src/gallium/auxiliary/gallivm/lp_bld.h +@@ -82,7 +82,11 @@ + #define LLVMCreateBuilder ILLEGAL_LLVM_FUNCTION + + #if LLVM_VERSION_MAJOR >= 8 ++#if defined(__loongarch__) ++#define GALLIVM_HAVE_CORO 0 ++#else + #define GALLIVM_HAVE_CORO 1 ++#endif + #else + #define GALLIVM_HAVE_CORO 0 + #endif +diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c b/src/gallium/auxiliary/gallivm/lp_bld_init.c +index 3f040ac..9c251d8 100644 +--- a/src/gallium/auxiliary/gallivm/lp_bld_init.c ++++ b/src/gallium/auxiliary/gallivm/lp_bld_init.c +@@ -46,7 +46,7 @@ + #endif + #include + #if GALLIVM_HAVE_CORO +-#if LLVM_VERSION_MAJOR <= 8 && (defined(PIPE_ARCH_AARCH64) || defined (PIPE_ARCH_ARM) || defined(PIPE_ARCH_S390) || defined(PIPE_ARCH_MIPS64)) ++#if LLVM_VERSION_MAJOR <= 8 && (defined(PIPE_ARCH_AARCH64) || defined (PIPE_ARCH_ARM) || defined(PIPE_ARCH_S390) || defined(PIPE_ARCH_MIPS64) || defined(PIPE_ARCH_LOONGARCH64)) + #include + #endif + #include +@@ -135,7 +135,7 @@ create_pass_manager(struct gallivm_state *gallivm) + } + + #if GALLIVM_HAVE_CORO +-#if LLVM_VERSION_MAJOR <= 8 && (defined(PIPE_ARCH_AARCH64) || defined (PIPE_ARCH_ARM) || defined(PIPE_ARCH_S390) || defined(PIPE_ARCH_MIPS64)) ++#if LLVM_VERSION_MAJOR <= 8 && (defined(PIPE_ARCH_AARCH64) || defined (PIPE_ARCH_ARM) || defined(PIPE_ARCH_S390) || defined(PIPE_ARCH_MIPS64) || defined(PIPE_ARCH_LOONGARCH64)) + LLVMAddArgumentPromotionPass(gallivm->cgpassmgr); + LLVMAddFunctionAttrsPass(gallivm->cgpassmgr); + #endif +-- +2.20.1 + diff --git a/0003-gallivm-arit-use-LLVMBuildFPToUI-when-the-float-is-n.patch b/0003-gallivm-arit-use-LLVMBuildFPToUI-when-the-float-is-n.patch new file mode 100644 index 0000000..585f1e7 --- /dev/null +++ b/0003-gallivm-arit-use-LLVMBuildFPToUI-when-the-float-is-n.patch @@ -0,0 +1,29 @@ +From 9f3e5b7bbbef4c8fd2f0cbbe62a4fef5582f465f Mon Sep 17 00:00:00 2001 +From: suijingfeng +Date: Mon, 16 Aug 2021 14:42:57 +0800 +Subject: [PATCH 3/4] gallivm: arit: use LLVMBuildFPToUI when the float is not + signed + +--- + src/gallium/auxiliary/gallivm/lp_bld_arit.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/src/gallium/auxiliary/gallivm/lp_bld_arit.c b/src/gallium/auxiliary/gallivm/lp_bld_arit.c +index 1c71c05..b1eb5ef 100644 +--- a/src/gallium/auxiliary/gallivm/lp_bld_arit.c ++++ b/src/gallium/auxiliary/gallivm/lp_bld_arit.c +@@ -2403,7 +2403,10 @@ lp_build_iround(struct lp_build_context *bld, + res = LLVMBuildFAdd(builder, a, half, ""); + } + +- res = LLVMBuildFPToSI(builder, res, int_vec_type, ""); ++ if (type.sign) ++ res = LLVMBuildFPToSI(builder, res, int_vec_type, ""); ++ else ++ res = LLVMBuildFPToUI(builder, res, int_vec_type, ""); + + return res; + } +-- +2.20.1 + diff --git a/0004-gallivm-add-more-optlevel-for-debug-purpose-on-loong.patch b/0004-gallivm-add-more-optlevel-for-debug-purpose-on-loong.patch new file mode 100644 index 0000000..caf7f18 --- /dev/null +++ b/0004-gallivm-add-more-optlevel-for-debug-purpose-on-loong.patch @@ -0,0 +1,66 @@ +From 1043c69f60f9042d770bb92627a6f7736637d739 Mon Sep 17 00:00:00 2001 +From: suijingfeng +Date: Fri, 9 Jul 2021 15:25:06 +0800 +Subject: [PATCH 4/4] gallivm: add more optlevel for debug purpose on + loongarch64 + +Signed-off-by: suijingfeng +--- + src/gallium/auxiliary/gallivm/lp_bld_debug.h | 6 ++++++ + src/gallium/auxiliary/gallivm/lp_bld_init.c | 16 ++++++++++++++++ + 2 files changed, 22 insertions(+) + +diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.h b/src/gallium/auxiliary/gallivm/lp_bld_debug.h +index a5dd7b8..86604e0 100644 +--- a/src/gallium/auxiliary/gallivm/lp_bld_debug.h ++++ b/src/gallium/auxiliary/gallivm/lp_bld_debug.h +@@ -49,6 +49,12 @@ + #define GALLIVM_PERF_NO_OPT (1 << 3) + #define GALLIVM_PERF_NO_AOS_SAMPLING (1 << 4) + ++#if defined(PIPE_ARCH_LOONGARCH64) ++#define GALLIVM_PERF_OPT_O1 (1 << 5) ++#define GALLIVM_PERF_OPT_O2 (1 << 6) ++#define GALLIVM_PERF_OPT_O3 (1 << 7) ++#endif ++ + #ifdef __cplusplus + extern "C" { + #endif +diff --git a/src/gallium/auxiliary/gallivm/lp_bld_init.c b/src/gallium/auxiliary/gallivm/lp_bld_init.c +index 9c251d8..4a9ee17 100644 +--- a/src/gallium/auxiliary/gallivm/lp_bld_init.c ++++ b/src/gallium/auxiliary/gallivm/lp_bld_init.c +@@ -60,6 +60,11 @@ static const struct debug_named_value lp_bld_perf_flags[] = { + { "no_quad_lod", GALLIVM_PERF_NO_QUAD_LOD, "disable quad_lod optimization" }, + { "no_aos_sampling", GALLIVM_PERF_NO_AOS_SAMPLING, "disable aos sampling optimization" }, + { "nopt", GALLIVM_PERF_NO_OPT, "disable optimization passes to speed up shader compilation" }, ++#if defined(PIPE_ARCH_LOONGARCH64) ++ { "o3", GALLIVM_PERF_OPT_O3, "enable aggressive optimization passes" }, ++ { "o2", GALLIVM_PERF_OPT_O2, "enable medium optimization passes" }, ++ { "o1", GALLIVM_PERF_OPT_O1, "enable less optimization passes" }, ++#endif + DEBUG_NAMED_VALUE_END + }; + +@@ -270,6 +275,17 @@ init_gallivm_engine(struct gallivm_state *gallivm) + optlevel = Default; + } + ++#if defined(PIPE_ARCH_LOONGARCH64) ++ if (gallivm_perf & GALLIVM_PERF_OPT_O3) ++ optlevel = Aggressive; ++ else if (gallivm_perf & GALLIVM_PERF_OPT_O2) ++ optlevel = Default; ++ else if (gallivm_perf & GALLIVM_PERF_OPT_O1) ++ optlevel = Less; ++ else ++ optlevel = Default; ++#endif ++ + ret = lp_build_create_jit_compiler_for_module(&gallivm->engine, + &gallivm->code, + gallivm->cache, +-- +2.20.1 + diff --git a/mesa.spec b/mesa.spec index a0008f5..2657eeb 100644 --- a/mesa.spec +++ b/mesa.spec @@ -38,7 +38,7 @@ Name: mesa Summary: Mesa graphics libraries Version: 21.3.1 -Release: 3 +Release: 4 License: MIT URL: http://www.mesa3d.org @@ -46,6 +46,10 @@ Source0: https://mesa.freedesktop.org/archive/%{name}-%{version}.tar.xz Patch1: backport-fix-build-err-on-arm.patch Patch2: 0001-evergreen-big-endian.patch +Patch3: 0001-meson-add-loongarch64-build-support.patch +Patch4: 0002-gallivm-temporary-disable-coroutines-on-loongarch64.patch +Patch5: 0003-gallivm-arit-use-LLVMBuildFPToUI-when-the-float-is-n.patch +Patch6: 0004-gallivm-add-more-optlevel-for-debug-purpose-on-loong.patch BuildRequires: gcc BuildRequires: gcc-c++ @@ -520,6 +524,9 @@ done %endif %changelog +* Tue Oct 17 2023 yangxiaojuan - 21.3.1-4 +- Add loongarch64 support + * Thu Nov 3 2022 wuzx - 21.3.1-3 - Add sw64 architecture -- Gitee