diff --git a/1020-RISC-V-Add-support-for-Zcmop-extension.patch b/1020-RISC-V-Add-support-for-Zcmop-extension.patch new file mode 100644 index 0000000000000000000000000000000000000000..56781ec7f23b69baa6f0c3730f14e674be6f672f --- /dev/null +++ b/1020-RISC-V-Add-support-for-Zcmop-extension.patch @@ -0,0 +1,184 @@ +From af27540ef51f9b9791d894e39f7c94803459ee52 Mon Sep 17 00:00:00 2001 +From: Jin Ma +Date: Tue, 18 Jun 2024 20:10:34 +0800 +Subject: [PATCH] RISC-V: Add support for Zcmop extension + +--- + bfd/elfxx-riscv.c | 6 ++++++ + gas/NEWS | 4 ++++ + gas/testsuite/gas/riscv/march-help.l | 1 + + gas/testsuite/gas/riscv/zcmop.d | 16 ++++++++++++++++ + gas/testsuite/gas/riscv/zcmop.s | 10 ++++++++++ + include/opcode/riscv-opc.h | 17 +++++++++++++++++ + include/opcode/riscv.h | 1 + + opcodes/riscv-opc.c | 10 ++++++++++ + 8 files changed, 65 insertions(+) + create mode 100644 gas/testsuite/gas/riscv/zcmop.d + create mode 100644 gas/testsuite/gas/riscv/zcmop.s + +diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c +index 0b3e7f8cd67..ea92a27ba7e 100644 +--- a/bfd/elfxx-riscv.c ++++ b/bfd/elfxx-riscv.c +@@ -1204,6 +1204,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = + {"zcf", "zca", check_implicit_always}, + {"zcd", "zca", check_implicit_always}, + {"zcb", "zca", check_implicit_always}, ++ {"zcmop", "zca", check_implicit_always}, + {"smaia", "ssaia", check_implicit_always}, + {"smcdeleg", "ssccfg", check_implicit_always}, + {"ssccfg", "sscsrind", check_implicit_always}, +@@ -1393,6 +1394,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = + {"zcb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zcf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zcd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, ++ {"zcmop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {NULL, 0, 0, 0, 0} + }; + +@@ -2668,6 +2670,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, + case INSN_CLASS_SMCTR_OR_SSCTR: + return (riscv_subset_supports (rps, "smctr") + || riscv_subset_supports (rps, "ssctr")); ++ case INSN_CLASS_ZCMOP: ++ return riscv_subset_supports (rps, "zcmop"); + case INSN_CLASS_SVINVAL: + return riscv_subset_supports (rps, "svinval"); + case INSN_CLASS_H: +@@ -2949,6 +2953,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, + return _("zcb' and `zmmul', or `zcb' and `m"); + case INSN_CLASS_SMCTR_OR_SSCTR: + return _("smctr' or `ssctr"); ++ case INSN_CLASS_ZCMOP: ++ return "zcmop"; + case INSN_CLASS_SVINVAL: + return "svinval"; + case INSN_CLASS_H: +diff --git a/gas/NEWS b/gas/NEWS +index d403ca08ce1..b6289974db5 100644 +--- a/gas/NEWS ++++ b/gas/NEWS +@@ -1,5 +1,9 @@ + -*- text -*- + ++Changes in 2.42.1: ++ ++* Add support for RISC-V Zcmop extension with version 1.0. ++ + * Add support for RISC-V Zimop extension with version 1.0. + * Remove support for RISC-V privileged spec 1.9.1, but linker can still + recognize it in case of linking old objects. +diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l +index cfe5c2d86b9..709a828d041 100644 +--- a/gas/testsuite/gas/riscv/march-help.l ++++ b/gas/testsuite/gas/riscv/march-help.l +@@ -97,6 +97,7 @@ All available -march extensions for RISC-V: + zcb 1.0 + zcf 1.0 + zcd 1.0 ++ zcmop 1.0 + zcmp 1.0 + smaia 1.0 + smcdeleg 1.0 +diff --git a/gas/testsuite/gas/riscv/zcmop.d b/gas/testsuite/gas/riscv/zcmop.d +new file mode 100644 +index 00000000000..5f608c676c3 +--- /dev/null ++++ b/gas/testsuite/gas/riscv/zcmop.d +@@ -0,0 +1,16 @@ ++#as: -march=rv64i_zcmop ++#objdump: -d ++ ++.*:[ ]+file format .* ++ ++Disassembly of section .text: ++ ++0+000 : ++[ ]+[0-9a-f]+:[ ]+6081[ ]+c.mop.1 ++[ ]+[0-9a-f]+:[ ]+6181[ ]+c.mop.3 ++[ ]+[0-9a-f]+:[ ]+6281[ ]+c.mop.5 ++[ ]+[0-9a-f]+:[ ]+6381[ ]+c.mop.7 ++[ ]+[0-9a-f]+:[ ]+6481[ ]+c.mop.9 ++[ ]+[0-9a-f]+:[ ]+6581[ ]+c.mop.11 ++[ ]+[0-9a-f]+:[ ]+6681[ ]+c.mop.13 ++[ ]+[0-9a-f]+:[ ]+6781[ ]+c.mop.15 +diff --git a/gas/testsuite/gas/riscv/zcmop.s b/gas/testsuite/gas/riscv/zcmop.s +new file mode 100644 +index 00000000000..4b02e694f46 +--- /dev/null ++++ b/gas/testsuite/gas/riscv/zcmop.s +@@ -0,0 +1,10 @@ ++target: ++ # c.mop.n ++ c.mop.1 ++ c.mop.3 ++ c.mop.5 ++ c.mop.7 ++ c.mop.9 ++ c.mop.11 ++ c.mop.13 ++ c.mop.15 +diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h +index 24b7d3a67f4..5f4d66866b0 100644 +--- a/include/opcode/riscv-opc.h ++++ b/include/opcode/riscv-opc.h +@@ -2276,6 +2276,23 @@ + /* Smctr/Ssctr instruction. */ + #define MATCH_SCTRCLR 0x10400073 + #define MASK_SCTRCLR 0xffffffff ++/* Zcmop instructions. */ ++#define MATCH_C_MOP_1 0x6081 ++#define MASK_C_MOP_1 0xffff ++#define MATCH_C_MOP_3 0x6181 ++#define MASK_C_MOP_3 0xffff ++#define MATCH_C_MOP_5 0x6281 ++#define MASK_C_MOP_5 0xffff ++#define MATCH_C_MOP_7 0x6381 ++#define MASK_C_MOP_7 0xffff ++#define MATCH_C_MOP_9 0x6481 ++#define MASK_C_MOP_9 0xffff ++#define MATCH_C_MOP_11 0x6581 ++#define MASK_C_MOP_11 0xffff ++#define MATCH_C_MOP_13 0x6681 ++#define MASK_C_MOP_13 0xffff ++#define MATCH_C_MOP_15 0x6781 ++#define MASK_C_MOP_15 0xffff + /* Svinval instruction. */ + #define MATCH_SINVAL_VMA 0x16000073 + #define MASK_SINVAL_VMA 0xfe007fff +diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h +index 13803584153..4bcd5c35589 100644 +--- a/include/opcode/riscv.h ++++ b/include/opcode/riscv.h +@@ -473,6 +473,7 @@ enum riscv_insn_class + INSN_CLASS_ZCB_AND_ZBB, + INSN_CLASS_ZCB_AND_ZMMUL, + INSN_CLASS_SMCTR_OR_SSCTR, ++ INSN_CLASS_ZCMOP, + INSN_CLASS_SVINVAL, + INSN_CLASS_ZICBOM, + INSN_CLASS_ZICBOP, +diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c +index 8c785e104d6..6b263588a13 100644 +--- a/opcodes/riscv-opc.c ++++ b/opcodes/riscv-opc.c +@@ -2201,6 +2201,16 @@ const struct riscv_opcode riscv_opcodes[] = + {"c.zext.b", 0, INSN_CLASS_ZCB, "Cs", MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, 0 }, + {"c.sext.w", 64, INSN_CLASS_ZCB, "d", MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS }, + ++/* Zcmop instructions. */ ++{"c.mop.1", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_1, MASK_C_MOP_1, match_opcode, 0 }, ++{"c.mop.3", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_3, MASK_C_MOP_3, match_opcode, 0 }, ++{"c.mop.5", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_5, MASK_C_MOP_5, match_opcode, 0 }, ++{"c.mop.7", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_7, MASK_C_MOP_7, match_opcode, 0 }, ++{"c.mop.9", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_9, MASK_C_MOP_9, match_opcode, 0 }, ++{"c.mop.11", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_11, MASK_C_MOP_11, match_opcode, 0 }, ++{"c.mop.13", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_13, MASK_C_MOP_13, match_opcode, 0 }, ++{"c.mop.15", 0, INSN_CLASS_ZCMOP, "", MATCH_C_MOP_15, MASK_C_MOP_15, match_opcode, 0 }, ++ + /* Supervisor instructions. */ + {"csrr", 0, INSN_CLASS_ZICSR, "d,E", MATCH_CSRRS, MASK_CSRRS|MASK_RS1, match_opcode, INSN_ALIAS }, + {"csrwi", 0, INSN_CLASS_ZICSR, "E,Z", MATCH_CSRRWI, MASK_CSRRWI|MASK_RD, match_opcode, INSN_ALIAS }, +-- +2.43.5 + diff --git a/binutils.spec b/binutils.spec index 91b27a4c9ddc5008751bb2d3cf5aa8c2377a45a6..ad8a2c1ffbb3e90383ac3ea9b7b8db653fd9f52b 100644 --- a/binutils.spec +++ b/binutils.spec @@ -1,4 +1,4 @@ -%define anolis_release 2 +%define anolis_release 3 # Determine if this is a native build or a cross build. # # For a cross build add --define "binutils_target " to the command @@ -206,6 +206,7 @@ Patch1016: 1016-RISC-V-Add-support-for-Zimop-extension.patch Patch1017: 1017-RISC-V-Support-CFI-Zicfiss-and-Zicfilp-instructions-.patch Patch1018: 1018-RISC-V-Add-Zabha-extension-CAS-instructions.patch Patch1019: 1019-RISC-V-Don-t-generate-branch-jump-relocation-if-symb.patch +Patch1020: 1020-RISC-V-Add-support-for-Zcmop-extension.patch Provides: bundled(libiberty) @@ -840,6 +841,9 @@ exit 0 %doc README ChangeLog MAINTAINERS README-maintainer-mode %changelog +* Wed Sep 17 2025 Weisson - 2.42-3 +- RISC-V: Add support for Zcmop extension. + * Thu Jul 31 2025 Weisson - 2.42-2 - RISC-V: Add support for Zfbfmin extension.