diff --git a/src/bin/jbc2mpl b/src/bin/jbc2mpl
index e583957b4a404cdcf9debc5131affa5b29ec1770..5ce8087cabb84c9e47c3e6a6b2cdf3e3433a553b 100755
Binary files a/src/bin/jbc2mpl and b/src/bin/jbc2mpl differ
diff --git a/src/bin/maple b/src/bin/maple
index a67406e837c1e8cde92f11d1ad058df20d47beca..45d4a723374285e6381cddbe0208779457db8c6f 100755
Binary files a/src/bin/maple and b/src/bin/maple differ
diff --git a/src/bin/mplcg b/src/bin/mplcg
index a2e23a4f5ab25ab3da7a0ff19365238eebfd9c60..7af871ddf162916caf57efeeac2fcee293a99848 100755
Binary files a/src/bin/mplcg and b/src/bin/mplcg differ
diff --git a/src/maple_ir/include/mir_nodes.h b/src/maple_ir/include/mir_nodes.h
index 456af1a8b9271600889fb53e45098d5a554a431d..91b56a0268136d7161a1a13c63d4f1a813763715 100644
--- a/src/maple_ir/include/mir_nodes.h
+++ b/src/maple_ir/include/mir_nodes.h
@@ -1183,12 +1183,12 @@ class AddrofNode : public BaseNode {
     return stIdx;
   }
 
-  StIdx &GetStIdx() {
-    return stIdx;
+  void SetStIdx(StIdx idx) {
+    stIdx = idx;
   }
 
-  void SetStIdx(const StIdx &idx) {
-    stIdx = idx;
+  void SetStFullIdx(uint32 idx) {
+    stIdx.SetFullIdx(idx);
   }
 
   FieldID GetFieldID() const {
@@ -1750,7 +1750,7 @@ class SwitchNode : public StmtNode {
     SwitchNode *nd = allocator.GetMemPool()->New<SwitchNode>(allocator, *this);
     nd->SetSwitchOpnd(switchOpnd->CloneTree(allocator));
     for (size_t i = 0; i < switchTable.size(); i++) {
-      nd->GetSwitchTable().push_back(switchTable[i]);
+      nd->InsertCasePair(switchTable[i]);
     }
     return nd;
   }
@@ -1785,10 +1785,6 @@ class SwitchNode : public StmtNode {
     return switchTable;
   }
 
-  CaseVector &GetSwitchTable() {
-    return switchTable;
-  }
-
   CasePair GetCasePair(size_t idx) const {
     ASSERT(idx < switchTable.size(), "out of range in SwitchNode::GetCasePair");
     return switchTable.at(idx);
@@ -1797,6 +1793,19 @@ class SwitchNode : public StmtNode {
   void SetSwitchTable(CaseVector vec) {
     switchTable = vec;
   }
+
+  void InsertCasePair(CasePair pair) {
+    switchTable.push_back(pair);
+  }
+
+  void UpdateCaseLabelAt(uint32_t i, LabelIdx idx) {
+    switchTable[i] = std::make_pair(switchTable[i].first, idx);
+  }
+
+  void SortCasePair(bool func(const CasePair&, const CasePair&)) {
+    std::sort(switchTable.begin(), switchTable.end(), func);
+  }
+
  private:
   BaseNode *switchOpnd;
   LabelIdx defaultLabel;
@@ -2361,8 +2370,8 @@ class DoloopNode : public StmtNode {
     return doVarStIdx;
   }
 
-  StIdx &GetDoVarStIdx() {
-    return doVarStIdx;
+  void SetDoVarStFullIdx(uint32 idx) {
+    doVarStIdx.SetFullIdx(idx);
   }
 
   void SetIsPreg(bool isPregVal) {
diff --git a/src/maple_ir/src/mir_builder.cpp b/src/maple_ir/src/mir_builder.cpp
index facf2a651ef3c8e873d4e03317c43f9601528ea9..71d6bd31b404842821f0973e4a41a6702b82deb4 100644
--- a/src/maple_ir/src/mir_builder.cpp
+++ b/src/maple_ir/src/mir_builder.cpp
@@ -722,7 +722,7 @@ AddrofNode *MIRBuilder::CreateExprDread(MIRSymbol &symbol) {
 
 AddrofNode *MIRBuilder::CreateExprDread(PregIdx pregID, PrimType pty) {
   AddrofNode *dread = GetCurrentFuncCodeMp()->New<AddrofNode>(OP_dread, pty);
-  dread->GetStIdx().SetFullIdx(pregID);
+  dread->SetStFullIdx(pregID);
   return dread;
 }
 
diff --git a/src/maple_ir/src/mir_parser.cpp b/src/maple_ir/src/mir_parser.cpp
index afee5adb5342aa7f1dbee602bdf87b611c697206..ab1c688ffa647a9d7aae426b56ccc5cb57befd06 100644
--- a/src/maple_ir/src/mir_parser.cpp
+++ b/src/maple_ir/src/mir_parser.cpp
@@ -196,7 +196,7 @@ bool MIRParser::ParseStmtDoloop(StmtNodePtr &stmt) {
   if (lexer.GetTokenKind() == kTkPreg) {
     PregIdx pregidx = LookupOrCreatePregIdx(static_cast<uint32>(lexer.GetTheIntVal()), false, *mod.CurFunction());
     doloopnode->SetIsPreg(true);
-    doloopnode->GetDoVarStIdx().SetFullIdx(pregidx);
+    doloopnode->SetDoVarStFullIdx(pregidx);
     // let other appearances handle the preg primitive type
   } else {
     StIdx stIdx;
@@ -537,7 +537,6 @@ bool MIRParser::ParseStmtSwitch(StmtNodePtr &stmt) {
   // ...
   // <intconstn>: goto <labeln>
   TokenKind tk = lexer.NextToken();
-  MapleVector<CasePair> &switchtable = switchnode->GetSwitchTable();
   std::set<int32> casesSet;
   while (tk != kTkRbrace) {
     int32 constVal = 0;
@@ -550,7 +549,7 @@ bool MIRParser::ParseStmtSwitch(StmtNodePtr &stmt) {
       Error("duplicated switch case ");
       return false;
     }
-    switchtable.push_back(CasePair(constVal, lbl));
+    switchnode->InsertCasePair(CasePair(constVal, lbl));
     casesSet.insert(constVal);
     tk = lexer.GetTokenKind();
   }