From 1963da518c53981056df9a5d804636b43109742d Mon Sep 17 00:00:00 2001 From: Jiakun Shuai Date: Wed, 22 Oct 2025 10:39:13 +0800 Subject: [PATCH] PCI: Add ACS quirk for phytium root ports The phytium PCIe root ports do not support ACS at this point. However, the hardware provides isolation and source validation through the SMMU. The stream ID generated by the PCIe ports contain both the bus/device/function number as well as the port ID in its 3 most significant bits. Turn on ACS but disable all the peer-to-peer features. Signed-off-by: Jiakun Shuai --- drivers/pci/quirks.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 6ddb5b50a14a..39e91a7b1dd9 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5071,6 +5071,22 @@ static int pci_quirk_wangxun_nic_acs(struct pci_dev *dev, u16 acs_flags) return false; } +/* + * Phytium 5000E SOC have no ACS capability, and on multi-function + * devices, peer-to-peer transactions are not be used between the functions. + * So add an ACS quirk for below devices to isolate functions. + */ +static int pci_quirk_phytium_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags) +{ + switch (dev->device) { + case 0x0100: + return pci_acs_ctrl_enabled(acs_flags, + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); + } + + return false; +} + static const struct pci_dev_acs_enabled { u16 vendor; u16 device; @@ -5242,6 +5258,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, /* Wangxun nics */ { PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs }, + /* Phytium Socs */ + { PCI_VENDOR_ID_PHYTIUM, PCI_ANY_ID, pci_quirk_phytium_pcie_ports_acs }, { 0 } }; -- Gitee