From 49934570c9f02fd96a352b263ba5163a4a37ef49 Mon Sep 17 00:00:00 2001 From: Wang Zhimin Date: Wed, 2 Apr 2025 21:51:17 -0400 Subject: [PATCH] mm/init: Add quirk for phytium ps23064 SoC Enabling KASAN in the Phytium ps23064 SoC will result in a reduction in linear mapping space, leading to a failure and panic in allocating percpu variables. This patch avoid this problem throuth removing high physical addresses, but it should be note that device should not be attach to die 5-7. Signed-off-by: Huang Shaobo Signed-off-by: Wang Zhimin --- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/mm/init.c | 18 +++++++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 3226929c8816..e76e2ce54ca8 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -88,6 +88,7 @@ #define PHYTIUM_CPU_PART_2000PLUS 0X662 #define PHYTIUM_CPU_PART_2004 0X663 #define PHYTIUM_CPU_PART_2500 0X663 +#define PHYTIUM_CPU_PART_FTC862 0x862 #define CAVIUM_CPU_PART_THUNDERX 0x0A1 #define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2 @@ -151,6 +152,7 @@ #define MIDR_HISI_LINXICORE9100 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_LINXICORE9100) #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1) +#define MIDR_PHYTIUM_FTC862 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC862) /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */ #define MIDR_FUJITSU_ERRATUM_010001 MIDR_FUJITSU_A64FX diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 0f321d131638..bb0048ca5e07 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -280,6 +280,19 @@ static void __init fdt_enforce_memory_region(void) memblock_add(usable_rgns[1].base, usable_rgns[1].size); } +#ifdef CONFIG_ARCH_PHYTIUM +#define SOCID_PS23064 0x8 +#define RMV_PS23064 0x510783f00000 +static inline void phytium_ps23064_quirk(void) +{ + if (read_sysreg_s(SYS_AIDR_EL1) == SOCID_PS23064 && + read_cpuid_id() == MIDR_PHYTIUM_FTC862) { + pr_warn("Enable Phytium S5000C-128 Core quirk\n"); + memblock_remove(RMV_PS23064, (1ULL << PHYS_MASK_SHIFT) - RMV_PS23064); + } +} +#endif + void __init arm64_memblock_init(void) { const s64 linear_region_size = BIT(vabits_actual - 1); @@ -289,7 +302,10 @@ void __init arm64_memblock_init(void) /* Remove memory above our supported physical address size */ memblock_remove(1ULL << PHYS_MASK_SHIFT, ULLONG_MAX); - +#ifdef CONFIG_ARCH_PHYTIUM + if (IS_ENABLED(CONFIG_KASAN)) + phytium_ps23064_quirk(); +#endif /* * Select a suitable value for the base of physical memory. */ -- Gitee