diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 0db618ccf9a49c7ef827f4914f5e57e753fd48be..dd2f869c33cde6ace03eea55cc5460e5f6406444 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -193,7 +193,7 @@ static u64 l3_thread_slice_mask(u64 config) if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON && boot_cpu_data.x86 == 0x18) { - if (boot_cpu_data.x86_model == 0x6) + if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf) return ((config & HYGON_L3_SLICE_MASK) ? : HYGON_L3_SLICE_MASK) | ((config & HYGON_L3_THREAD_MASK) ? : HYGON_L3_THREAD_MASK); else @@ -274,8 +274,9 @@ static int amd_uncore_event_init(struct perf_event *event) static umode_t hygon_f18h_m6h_uncore_is_visible(struct kobject *kobj, struct attribute *attr, int i) { - return boot_cpu_data.x86 == 0x18 && boot_cpu_data.x86_model == 0x6 ? - attr->mode : 0; + return boot_cpu_data.x86 == 0x18 && + boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf ? + attr->mode : 0; } static ssize_t amd_uncore_attr_show_cpumask(struct device *dev, @@ -685,11 +686,11 @@ static int __init amd_uncore_init(void) boot_cpu_data.x86 == 0x18) { *l3_attr++ = &format_attr_event8.attr; *l3_attr++ = &format_attr_umask.attr; - *l3_attr++ = &format_attr_slicemask.attr; - if (boot_cpu_data.x86_model == 0x6) { + if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf) { *l3_attr++ = &format_attr_threadmask32.attr; amd_llc_pmu.attr_update = hygon_uncore_l3_attr_update; } else { + *l3_attr++ = &format_attr_slicemask.attr; *l3_attr++ = &format_attr_threadmask8.attr; } } diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 4fe5d30397ec135dd608e1aea399622c073998d2..a459ae8b9f7c1d63affad5906e66ed0102fc194e 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -29,9 +29,11 @@ #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1 #define PCI_DEVICE_ID_HYGON_18H_M05H_ROOT 0x14a0 +#define PCI_DEVICE_ID_HYGON_18H_M10H_ROOT 0x14c0 #define PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1 0x1491 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1 0x14b1 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F4 0x14b4 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F4 0x14d4 #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5 0x14b5 /* Protect the PCI config register pairs used for SMN and DF indirect access. */ @@ -93,6 +95,7 @@ static const struct pci_device_id hygon_root_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_ROOT) }, {} }; @@ -100,6 +103,7 @@ static const struct pci_device_id hygon_nb_misc_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3) }, {} }; @@ -107,6 +111,7 @@ static const struct pci_device_id hygon_nb_link_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F4) }, {} }; @@ -279,6 +284,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1; break; case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1; break; default: @@ -287,6 +293,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value } else if (func == 5) { switch (boot_cpu_data.x86_model) { case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5; break; default: diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c index f467b9d18c52a9028cc278881e823f90a76bd322..c2d9f007fd37987b65c13690a1287f312b65c722 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -693,7 +693,8 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu) if (!cpuid_edx(0x80000006)) return; - if (c->x86_model < 0x5) { + if (c->x86_model < 0x5 || + (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) { /* * LLC is at the core complex level. * Core complex ID is ApicId[3] for these processors. diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 0b6b6625d3065405ce1ec08762761a7525bfd2ba..55296297171231547c2516d70048b8638609347b 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2457,6 +2457,16 @@ static struct amd64_family_type family_types[] = { .dbam_to_cs = f17_addr_mask_to_cs_size, } }, + [F18_M10H_CPUS] = { + .ctl_name = "F18h_M10h", + .f0_id = PCI_DEVICE_ID_HYGON_18H_M10H_DF_F0, + .f6_id = PCI_DEVICE_ID_HYGON_18H_M10H_DF_F6, + .max_mcs = 2, + .ops = { + .early_channel_count = f17_early_channel_count, + .dbam_to_cs = f17_addr_mask_to_cs_size, + } + }, [F19_CPUS] = { .ctl_name = "F19h", .f0_id = PCI_DEVICE_ID_AMD_19H_DF_F0, @@ -3563,6 +3573,16 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) fam_type = &family_types[F18_M06H_CPUS]; pvt->ops = &family_types[F18_M06H_CPUS].ops; break; + } else if (pvt->model == 0x7) { + fam_type = &family_types[F18_M06H_CPUS]; + pvt->ops = &family_types[F18_M06H_CPUS].ops; + family_types[F18_M06H_CPUS].ctl_name = "F18h_M07h"; + break; + } else if (pvt->model == 0x10) { + fam_type = &family_types[F18_M10H_CPUS]; + pvt->ops = &family_types[F18_M10H_CPUS].ops; + family_types[F18_M10H_CPUS].ctl_name = "F18h_M10h"; + break; } fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 3c82cedc4eec9cf0aef9ae99b218869b90edf332..ac2d939fb984080a5c80bd1b495dc858770e7a16 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -131,6 +131,8 @@ #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F0 0x14b0 #define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F6 0x14b6 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F0 0x14d0 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F6 0x14d6 /* * Function 1 - Address Map @@ -306,6 +308,7 @@ enum amd_families { F17_M60H_CPUS, F17_M70H_CPUS, F18_M06H_CPUS, + F18_M10H_CPUS, F19_CPUS, F19_M10H_CPUS, NUM_FAMILIES, diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index 7121f44ae1fbbf688787d0be82e4cb05ff2d7fa8..e08bb92d3451b2557d8a7e57f1f98f3192724c3b 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -555,6 +555,7 @@ static const struct pci_device_id k10temp_id_table[] = { { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3) }, + { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3) }, {} }; MODULE_DEVICE_TABLE(pci, k10temp_id_table); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index b3dce4e632080d60385208653b10fc06bee9f570..2a87de3c0b3e716c5c0795472a41d3ac207acb1a 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2600,7 +2600,9 @@ #define PCI_VENDOR_ID_HYGON 0x1d94 #define PCI_DEVICE_ID_HYGON_18H_M05H_HDA 0x14a9 +#define PCI_DEVICE_ID_HYGON_18H_M10H_HDA 0x14c9 #define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3 0x14b3 +#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F3 0x14d3 #define PCI_VENDOR_ID_HXT 0x1dbf diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 620ce3e2f4424f5a820f70c2c8e64e91835ea9d7..6723ad4bfc4d279aa81ea55f5bbd8e97ce753a72 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2821,10 +2821,10 @@ static const struct pci_device_id azx_ids[] = { .driver_data = AZX_DRIVER_ZXHDMI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT }, /* Hygon HDAudio */ - { PCI_DEVICE(0x1d94, 0x14a9), - .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | - AZX_DCAPS_NO_MSI }, - + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_HDA), + .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI }, + { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_HYGON_18H_M10H_HDA), + .driver_data = AZX_DRIVER_HYGON }, { 0, } }; MODULE_DEVICE_TABLE(pci, azx_ids);