diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c
index 7c08b032a7d6a0bfe4be48ea51319a62d9c3cb41..c6fb752375189628ceb2b6fc85662528fbe4c70c 100644
--- a/arch/loongarch/kernel/setup.c
+++ b/arch/loongarch/kernel/setup.c
@@ -186,14 +186,12 @@ bool wc_enabled = false;
 
 EXPORT_SYMBOL(wc_enabled);
 
-static int wc_arg = -1;
-
 static int __init setup_writecombine(char *p)
 {
 	if (!strcmp(p, "on"))
-		wc_arg = true;
+		wc_enabled = true;
 	else if (!strcmp(p, "off"))
-		wc_arg = false;
+		wc_enabled = false;
 	else
 		pr_warn("Unknown writecombine setting \"%s\".\n", p);
 
@@ -375,28 +373,6 @@ static void __init bootcmdline_init(char **cmdline_p)
 	*cmdline_p = boot_command_line;
 }
 
-static void __init writecombine_detect(void)
-{
-	u64 cpuname;
-
-	if (wc_arg >= 0) {
-		wc_enabled = wc_arg;
-		return;
-	}
-
-	cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
-
-	switch (cpuname) {
-	case 0x0000303030364333:
-		wc_enabled = true;
-		break;
-	default:
-		break;
-	}
-
-	return;
-}
-
 void __init platform_init(void)
 {
 	arch_reserve_vmcore();
@@ -420,8 +396,6 @@ void __init platform_init(void)
 	smbios_parse();
 	pr_info("The BIOS Version: %s\n", b_info.bios_version);
 
-	writecombine_detect();
-	pr_info("WriteCombine: %s\n", wc_enabled ? "on":"off");
 	efi_runtime_init();
 }
 
diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
index 667fb0368ef6d5a6a9d987636a72e77aeca8de3a..08e0e3ffad1319d8a32a21b37e1b070ae0a9acaa 100644
--- a/include/drm/drm_cache.h
+++ b/include/drm/drm_cache.h
@@ -74,7 +74,7 @@ static inline bool drm_arch_can_wc_memory(void)
 	 * cache coherency machanism. This means WUC can only used for write-only
 	 * memory regions.
 	 */
-	return wc_enabled;
+	return false;
 #else
 	return true;
 #endif